|
DDS FREQUENCY
SYNTHESIZER

Description
The unit
generates a highly stable,
frequency-phase-programmable sine and cosine outputs.
The main
features of DDS are:
-
300
MHz internal clock rate.
-
FSK,
BPSK, PSK, CHIRP, AM operation.
-
Dual
integrated 12-Bit D/A converters.
-
Ultrahigh-speed comparator, 3 ps RMS jitter.
-
4-to
20-programmable reference clock multiplier.
-
Dual
48-bit programmable frequency registers.
-
Dual
14-bit programmable phase offset registers.
Specification
|
Inputs
ref clock frequency |
5 to 15 MHz (Max frequency is 300
MHz with multiplier =x20) |
|
Input clock Voltage level |
2.3 VIH for single ended, 0.8 Vp-p
differential mode |
|
Output update Speed |
300 MSPS |
|
Resolution |
12 bits |
|
In phase (I) and Quadrature (Q) |
10 mA |
|
Programming of
output controller |
89c2051 |
|
Glue logic
Interface |
CPLD XC9572XL |
|
RS422
transceiver |
One |
|
No of LVDS
receivers |
2, differential mode |
|
No of LVDS
drivers |
1, differential mode |
|
SMA connectors
for external Interface |
4 |
|
Differential
input / output connectors |
26 pin FRC connector |
|
Supply voltage |
5V, 3.3V |
|